NXP Semiconductors
Sr. Lead ASIC design Engineer - Digital Design
Employment
Full-timeFrom the employer
Full time
Level
Senior / LeadCategory
EngineeringCountry assessment
Not doable from Austria because it is tied to an office and never says it can be done remotely.
Our assessment is guidance. Confirm arrangements with the employer.
Job description
- Key Responsibilities
- Define and implement hardware architectures optimized for AI inference SOC's
- Contribute to micro-architecture definition and evaluate design trade-offs for complex SOC including custom-ISA based processors, high-speed interconnects & high-bandwidth IO's
- Own features end-to-end: specification → RTL → integration → synthesis → debug
- Collaborate with physical design teams on synthesis, timing closure, and power optimization.
- Collaborate with verification team to ensure design correctness.
- Work with architect engineers to model workloads, analyze performance bottlenecks, and validate AI inference use cases.
- Required Qualifications
- 7+ years of experience in ASIC/SoC RTL design
- Strong Verilog/SystemVerilog coding skills
- Solid understanding of synthesis, timing, and power analysis
- Experience with Lint/CDC/RDC flows
- Strong debugging and root-cause analysis capability